06.07.25 | Vollzeit | Villach | www.kaerntnerjobs.atOf developing physical verification rule decks (DRC, LVS, PRE) - Programming skills Calibre SVRF, Cadence Skill, Python, Tcl, Perl,Scripting - Experience with Unix/Linux
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01.07.25 | Vollzeit | Villach | Infineon Technologies AGAt least 3 years of experience in PDK development, preferably in a Cadence based design flow - Profound experience of developing physical verification rule decks (DRC, LVS, PRE) - Programming skills Calibre SVRF, Cadence Skill, Python, Tcl, Perl,Scripting - Experience with Unix/Linux - Exposure to working
Später ansehen01.07.25 | Vollzeit | Villach | Infineon Technologies AGAt least 3 years of experience in PDK development, preferably in a Cadence based design flow - Profound experience of developing physical verification rule decks (DRC, LVS, PRE) - Programming skills Calibre SVRF, Cadence Skill, Python, Tcl, Perl,Scripting - Experience with Unix/Linux - Exposure to working
Später ansehen01.07.25 | Vollzeit | Villach | Infineon Technologies AGAt least 3 years of experience in PDK development, preferably in a Cadence based design flow - Profound experience of developing physical verification rule decks (DRC, LVS, PRE) - Programming skills Calibre SVRF, Cadence Skill, Python, Tcl, Perl,Scripting - Experience with Unix/Linux - Exposure to working
Später ansehen01.07.25 | Vollzeit | Villach | Infineon Technologies AGAt least 3 years of experience in PDK development, preferably in a Cadence based design flow - Profound experience of developing physical verification rule decks (DRC, LVS, PRE) - Programming skills Calibre SVRF, Cadence Skill, Python, Tcl, Perl,Scripting - Experience with Unix/Linux - Exposure to working
Später ansehen01.07.25 | Vollzeit | Villach | Infineon Technologies AGAt least 3 years of experience in PDK development, preferably in a Cadence based design flow - Profound experience of developing physical verification rule decks (DRC, LVS, PRE) - Programming skills Calibre SVRF, Cadence Skill, Python, Tcl, Perl,Scripting - Experience with Unix/Linux - Exposure to working
Später ansehen01.07.25 | Vollzeit | Villach | Infineon Technologies AGAt least 3 years of experience in PDK development, preferably in a Cadence based design flow - Profound experience of developing physical verification rule decks (DRC, LVS, PRE) - Programming skills Calibre SVRF, Cadence Skill, Python, Tcl, Perl,Scripting - Experience with Unix/Linux - Exposure to working
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